1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device. More particularly, the invention relates to an In-Plane Switching mode liquid crystal display (IPS mode LCD) device and a method for manufacturing the same to maximize an aperture ratio.
2. Discussion of the Related Art
Recently, liquid crystal display (LCD) devices have been actively studied and researched because of its advantageous characteristics such as high contrast ratio, great gray level, high picture quality and low power consumption. The LCD device is especially suitable for an ultra-thin display device such as a wall-mountable television. Also, the LCD device has attracted great attention as a new display device that can be substitute for a CRT in that the LCD device has thin profile, lightweight and low power consumption. For example, the LCD device may be used for a display of a notebook computer being operated by a battery. Additionally, the LCD device fabricated as a small panel may be widely used for a display of a mobile phone.
The LCD device has various modes according to the properties of liquid crystal and pattern structures. More specifically, the LCD device may be categorized into a Twisted Nematic (TN) mode of controlling liquid crystal director by applying a voltage after arrangement of liquid crystal director twisted at 90°, a multi-domain mode of obtaining a wide viewing angle by dividing one pixel into several domains, an Optically Compensated Birefringence (OCB) mode of compensating a phase change of light according to a progressing direction of light by forming a compensation film on an outer surface of a substrate, an In-Plane Switching (IPS) mode of forming an electric field substantially parallel to two substrates by forming two electrodes on any one substrate, and a Vertical Alignment (VA) mode of arranging a longitudinal (major) axis of liquid crystal molecule vertical to a plane of an alignment layer by using a negative type liquid crystal and a vertical alignment layer.
Among the various types of LCD devices, the IPS mode LCD device generally includes a color filter array substrate, a thin film transistor TFT array substrate, and a liquid crystal layer, wherein the color filter array substrate and the thin film transistor array substrate are positioned to oppose each other, and the liquid crystal layer is formed between the two substrates. The color filter array substrate includes a black matrix layer for preventing light leakage, and an RIG/B color filter layer for realizing various colors on the black matrix layer. Also, the thin film transistor TFT array substrate includes gate and data lines crossing each other to define a pixel region, a switching device formed at a crossing point of the gate and data lines, and common and pixel electrodes alternately formed to generate an electric field substantially parallel to the two substrates.
A related art EPS mode LCD device will be described with reference to the accompanying drawings. FIG. 1 is a plan view illustrating a related art IPS mode LCD device. FIG. 2 is a cross sectional view of an IPS mode LCD device along I-I′ of FIG. 1. FIG. 3 is a voltage distribution of an IPS mode LCD device along II-II′ of FIG. 1. FIG. 4A and FIG. 4B are plan views illustrating an IPS mode LCD device when a voltage is turned on/off. FIG. 5 is a graph illustrating the voltage-transmittance (V-T) characteristics of a related art IPS mode LCD device.
Hereinafter, the related art IPS mode LCD device will be described with reference to FIG. 1 and FIG. 2. First, a thin film transistor TFT array substrate 11 includes a gate line 12, a data line 15, and a thin film transistor TFT. In this state, a gate insulating layer 13 is interposed between the gate line 12 and the data line 15, wherein the gate line 12 is formed substantially perpendicular to the data line 15 to define a unit pixel region. Also, the thin film transistor TFT is formed at a crossing point of the gate line 12 and the data line 15. The thin film transistor TFT is comprised of a gate electrode 12a, the gate insulating layer 13, a semiconductor layer 14, and source/drain electrodes 15a/15b. The gate electrode 12a extends from the gate line 12, and the gate insulating layer 13 is formed on an entire surface of the thin film transistor TFT array substrate 11 including the gate electrode 12a. Also, the semiconductor layer 14 is formed on the gate insulating layer 13 above the gate electrode 12a. Then, the source/drain electrodes 15a/15b, extending from the data line 15, are overlapped with both sides of the semiconductor layer 14.
In each pixel region, there are a common line 25, a plurality of common electrodes 24, and a plurality of pixel electrodes 17. The common line 25 is formed substantially parallel to the gate line 12 within the pixel region. The plurality of common electrodes 24, extending from the common line 25, are formed substantially parallel to the data line 15 within each pixel region. Also, the plurality of pixel electrodes 17 are connected to the drain electrode 15b of the thin film transistor TFT through a passivation layer 16 in each pixel region, wherein each pixel electrode 17 alternates with each common electrode 24 in parallel.
A color filter array substrate 21 includes a black matrix layer 22, and a color filter layer 23 of red(R)/green(G)/blue(B). The black matrix layer 22 is formed on the color filter array substrate 21 corresponding to a remaining portion of the substrate that does not include the pixel region of the thin film transistor TFT array substrate 11, for preventing light leakage. Also, the color filter layer 23 of R/G/B is formed to correspond to the pixel region between patterns of the black matrix layer 22, to display colors.
Next, the thin film transistor TFT array substrate 11 and the color filter array substrate 21 are bonded to each other by a sealant (not shown) of an adhesive, and then a liquid crystal layer 31 is formed between the thin film transistor TFT array substrate 11 and the color filter array substrate 21. In addition, alignment layers 30a and 30b are formed on inner surfaces of the thin film transistor TFT array substrate 11 and the color filter array substrate 21 having the various patterns, thereby initially aligning liquid crystal molecules of the liquid crystal layer 31.
In the aforementioned IPS mode LCD device, the common electrode 24 and the pixel electrode 17 are formed on the same substrate, to align the liquid crystal molecules in substantially parallel to the substrates. In this state, if a voltage is applied between the two electrodes, an electric field E generates substantially parallel to the substrates. Accordingly, it is possible to decrease the change on birefringence of the liquid crystal to a direction of viewing angle, thereby realizing a wider viewing angle, as compared with a related art TN mode LCD device.
Specifically, as shown in FIG. 3, if 6V is applied to the common electrode 24, and 0V is applied to the pixel electrode 17, an equipotential surface is formed substantially parallel to the electrodes at the portions right on the electrodes, and the equipotential surface is formed in perpendicular to the electrodes at the portion between the two electrodes. Thus, since the electric field is perpendicular to the equipotential surface, a horizontal electric field is formed between the common electrode 24 and the pixel electrode 17, a vertical electric field is formed on the respective electrodes, and both the horizontal and vertical electric fields are complexly formed in the side of the electrodes.
An alignment of liquid crystal molecules in the related art IPS mode LCD device is controlled with the electric field. For example, as shown in FIG. 4A, if a sufficient voltage is applied to the liquid crystal molecules 32 initially aligned at a same direction as a transmission axis of one polarizing sheet, long axes of the liquid crystal molecules 32 are aligned substantially parallel to the electric field. In case the dielectric anisotropy of liquid crystal is negative, short axes of the liquid crystal molecules are aligned substantially parallel to the electric field.
At this time, first and second polarizing sheets are formed on outer surfaces of the thin film transistor TFT array substrate and the color filter array substrate bonded to each other, wherein the transmission axes of the first and second polarizing sheets are positioned perpendicular to each other. Also, the alignment layer is rubbed parallel to the transmission axis of one polarizing sheet, whereby it is displayed on a normally black mode. In the case of a normally black mode, if a voltage is not applied to the device, as shown in FIG. 4A, the liquid crystal molecules 32 are maintained in the initial alignment state, thereby displaying the black state. In the meantime, as shown in FIG. 4B, if a voltage is applied to the device, the liquid crystal molecules 32 are aligned in parallel to the electric field, thereby displaying a white state.
When the liquid crystal molecules 32 are re-aligned with being rotated at the direction of 45°, it is possible to realize the maximum transmittance in the device. However, if a high voltage above a predetermined value is applied to the device, the liquid crystal molecules 32 are re-aligned at the direction above 45°, so that the liquid crystal molecules 32 have the strong property for being aligned in parallel to the horizontal electric field, thereby decreasing the transmittance. That is, as shown in FIG. 5, on the assumption that the maximum voltage applied to the IPS mode LCD device is about 10V, the maximum transmittance is obtained when 6V is applied to the device, and the transmittance is lowered when the voltage above 6V is applied to the device.